The first approach utilizes a single CPU-controlled shared bus that connects a number of slave interface cards. This arrangement can be based on a general-purpose computer, such as a PC running UNIX or Windows NT. Various bus communication strategies (such as shared memory, DMA, and bus mastering), together with high-performance RISC CPUs, can result in a router of significant forwarding capabilities.
A large number of dedicated-purpose centralized CPU router platforms also are available on the low-end market, such as the ubiquitous Cisco 2500 series. Over time, the forwarding performance and cost of such architectures have improved through the introduction of ASICs.
The advantage of the single CPU approach is the simplicity of software: The majority of the packet-switching intelligence, and certainly all of the route calculation intelligence, is in the single CPU. Little danger exists of synchronization problems, such as inconsistent forwarding behavior between line cards.
In addition, if the CPU is a general-purpose computer, the interaction between the CPU motherboard and the line cards usually conforms to an open bus/operating-system standard, enabling the administrator to choose among multiple vendors for both the line cards and the CPU. Single CPU designs also can be very cost-effective because the majority of the complex hardware is focused on the CPU itself.
The clear disadvantage of single CPU designs, however, is scalability and reliability. Involving a single CPU and shared bus in all forwarding decisions is problematic when the number of interfaces or the traffic level becomes very high. Moreover, even if using shared memory for packet storage minimizes bus transactions, shared memory access times can become a limiting factor.
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